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Google ASIC Digital Design Engineer, Silicon in Bengaluru, India

Minimum qualifications:

  • Bachelor's degree in Electrical Engineering or equivalent practical experience

  • Experience with multiple SoCs with silicon success

  • Experience with chip design flow

Preferred qualifications:

  • Master's degree in Electrical Engineering or related field

  • Domain knowledge and expertise with Memory controller/DDR

  • Understanding of cross-domain involving domain validation, design for testing, physical design, and software

  • Proficiency with ASIC design methodologies for front quality checks like; Lint, CDC/RDC, Synthesis, design for testing, ATPG/Memory BIST, UPF, and Low Power Optimization/Estimation

Our computational challenges are so big, complex and unique we can't just purchase off-the-shelf hardware, we've got to make it ourselves. Your team designs and builds the hardware, software and networking technologies that power all of Google's services. As a Hardware Engineer, you design and build the systems that are the heart of the world's largest and most powerful computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data centers affecting millions of Google users.

With your technical expertise, you lead projects in multiple areas of expertise (i.e., engineering domains or systems) within a data center facility, including construction and equipment installation/troubleshooting/debugging with vendors.

Google's mission is to organize the world's information and make it universally accessible and useful. Our Devices & Services team combines the best of Google AI, Software, and Hardware to create radically helpful experiences for users. We research, design, and develop new technologies and hardware to make our user's interaction with computing faster, seamless, and more powerful. Whether finding new ways to capture and sense the world around us, advancing form factors, or improving interaction methods, the Devices & Services team is making people's lives better through technology.

  • Work on both the IP design and integration activities including: plan tasks, support, hold code and design reviews, contribute on sub-system/chip-level integration.

  • Interact closely with the architecture team and develop implementation strategies to meet quality, schedule, and power performance area for IPs.

  • Interact closely with the subsystem team and plan SOC milestones, plan quality checks as part of SOC milestones (e.g., IPXACT, CSR, Lint, CDC, SDC, UPF, etc.).

  • Work closely with cross-functional teams of verification, design for test, physical design, emulation, and software to make design decisions and represent project status throughout the development process.

Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also https://careers.google.com/eeo/ and https://careers.google.com/jobs/dist/legal/OFCCPEEOPost.pdf If you have a need that requires accommodation, please let us know by completing our Accommodations for Applicants form: https://goo.gl/forms/aBt6Pu71i1kzpLHe2.

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